1. Field of the Invention
The invention relates in general to a method of controlling charge-coupled device sensing module, and more particularly to a method of controlling a charge-coupled device sensing module for use in a scanning apparatus.
2. Description of the Related Art
In an image scanning apparatus, a charge-coupled device (CCD) is used to acquire optical signals representing images scanned, convert the optical signals into image signals, and output the image signals to an analog signal processing circuit for further image signal processing in the next stage. In order to achieve image scanning with high resolution, a high resolution imager employing a staggered sensor structure is disclosed in U.S. Pat. No. 4,438,457. In addition, CCD sensing modules employing the staggered sensor structure have been widely utilized in the industry.
Referring to FIG. 1, it illustrates a CCD sensing module 100 employing the conventional staggered sensor structure. The CCD sensing module 100 provides a resolution of 600 dots per inch (dpi) for each row of its structure and has a width of nine inches, thereby allowing high resolution scanning, for example, scanning with a resolution of 1200 dpi. The CCD sensing module 100 includes a set of odd-numbered photosensors 102 and a set of even-numbered photosensors 104. The set of odd-numbered photosensors 102 includes photosensors D1, D3, . . . , D10799 while the set of even-numbered photosensors 104 includes photosensors D2, D4, . . . , D10800. The locations of the photosensors of the set of odd-numbered photosensors 102 and the set of even-numbered photosensors 104 are staggered. Each of the photosensors D1 to D10800 corresponds to an image signal of a pixel. During scanning an image, when the CCD sensing module 100 is exposed to light, the set of odd-numbered photosensors 102 and the set of even-numbered photosensors 104 detect optical signals corresponding to the image and generate signal charges referred to as Sn respectively, where n is a number equal to the corresponding photosensor Dn. That is, the photosensors D1, D3, . . . , D10799 and the photosensors D2, D4, . . . , D10800 generate signal charges S1, S3, . . . , S10799 and S2, S4, . . . , S10800 respectively. In addition, the signal charges S1, S3, . . . , S10799 and S2, S4, . . . , S10800 are simultaneously transmitted, in parallel, to a CCD shift register unit 105 via a shift gate (not shown). When the signal charges S1 to S10800 are completely sent to the CCD shift register unit 105, a next exposure of the CCD sensing module 100 can be made.
The CCD shift register unit 105 includes CCD shift registers 106 and 108. The signal charges S1, S3, . . . , S10799 and S2, S4, . . . , S10800 are sent to the CCD shift registers 106 and 108 respectively. For one of the signal charges, it can be denoted as signal charge S.
Controlled by a clock signal CK, the CCD shift register 106 feeds the signal charges S1, S3, . . . , S10799 serially into a charge receiving unit 109. Similarly, the CCD shift register 108 feeds the signal charges S2, S4, . . . , S10800 serially into the charge receiving unit 109. In this way, the signal charges S1, S3, . . . , S10799 and S2, S4, . . . , S10800 are alternately inputted to the charge receiving unit 109. The charge receiving unit 109 includes a control circuit 110 and a charge receiver such as an output capacitor C. The signal charges S1, S3, . . . , S10799 and S2, S4, . . . , S10800 are fed into the output capacitor C via the control circuit 110 so that the output capacitor C receives the signal charges S1, S2, S3, S4, . . . , S10799 and S10800 in sequence. The CCD sensing module 100 outputs the voltage across the output capacitor C as its output signal OS. The output signal OS is an analog signal representing pixels corresponding to the scanned image and is outputted to an analog signal processing circuit 112 in the next stage for further image signal processing.
Referring to FIG. 2, it illustrates a clock signal and reset signal conventionally for controlling the CCD sensing module 100 in FIG. 1. The clock signal CK is used to control the CCD shift registers 106 and 108. On receiving a clock pulse of the clock signal CK, the CCD shift registers 106 and 108 alternately output a signal charge S to the output capacitor C. For example, at time t1, a clock pulse 202 is applied to the CCD shift registers 106 and 108, and the CCD shift register 106 outputs the signal charge S1 to the output capacitor C, thereby generating a corresponding image signal. Next, before the next clock pulse 204 is applied to the CCD shift registers 106 and 108, a reset pulse 208 of the reset signal RS is applied to the control circuit 110 of the CCD sensing module 100 to reset the output capacitor C, i.e., to completely discharge the output capacitor C so as to receive a next signal charge S.
At time t2, the clock pulse 204 is applied to the CCD shift registers 106 and 108, and the CCD shift register 108 outputs the signal charge S2 to the output capacitor C, thus generating a corresponding image signal. A reset pulse 210 is then applied to the CCD sensing module to reset the output capacitor C. At time t3, a clock pulse 206 is applied to the CCD shift registers 106 and 108, and the CCD shift register 106 outputs the signal charge S3 to the output capacitor C so that an image signal corresponding to the signal charge S3 is generated. In this way, by repeating the same operation as above, the signal charges S4, S5, . . . , S10800 are sequentially outputted to the output capacitor C, thus generating corresponding image signals. After all of the signal charges outputted from the CCD shift registers 106 and 108 are fed into the output capacitor C, the CCD shift registers 106 and 108 are ready to receive signal charges generated by the CCD sensing module 100 in the next exposure.
For the clock signal CK, its adjacent clock pulses are generally required to be at least 1 μs (10−6 sec) apart so that the output signal OS has enough stable periods for the analog signal processing circuit 112 to acquire the signal representative of the scanned image from the output signal OS. For the CCD sensing module 100 with two sets of 5400 photosensors, totally 10800 photosensors, it uses at least 10800×1 μs=10.8 ms to completely output the signal charges S1 to S10800 generated by the set of odd-numbered photosensors 102 and the set of even-numbered photosensors 104, and to obtain required image signals. In order to allow the analog signal processing circuit to have enough process time to avoid improper operation, the conventional approach is to set an optimal exposure time for the CCD sensing module 100 to be 16 ms and to allow the CCD shift registers 106 and 108 to perform shifting signal charges and outputting the signal charges to the output capacitor C.
When the optimal exposure time for the CCD sensing module 100 is set to 16 ms, it is required to select a light tube with reduced brightness or a suitable light tube, so that the CCD sensing module 100 obtains an optional amount of exposure or a maximum signal-to-noise ratio, thereby minimizing the effect of the noise. However, if the brightness of the light tube is inappropriate, over-exposure may occur and the photosensors are to be saturated with charges, thereby degrading the quality of the image.
When the CCD sensing module 100 is used to perform low resolution scanning, such as 600 dpi scanning, the operation is as follows. First, the CCD sensing module 100 is exposed to light so that the photosensors D1 to D10800 generate signal charges S1 to S10800. Secondly, the signal charges S1 to S10800 are sent to the CCD shift registers 106 and 108. Next, the CCD shift registers 106 and 108 shift and output the signal charges S1 to S10800 sequentially to the output capacitor C, and only the signal charges S1, S3, . . . , S10799 generated by the set of odd-numbered photosensors 102 are required to be acquired. For the acquisition of the signal charges S1, S3, . . . , S10799 generated by the set of the odd-numbered photosensors only, clock signal CK and reset signal RS are shown in FIG. 3.
As shown in FIG. 3, before time t4, a reset pulse 302 is inputted into the CCD sensing module 100 to reset the output capacitor C. At time t4, a clock pulse 304 is inputted so that signal charge S1 is shifted to the output capacitor C. At time t5, a clock pulse 306 is inputted so that signal charge S2 is shifted to the output capacitor C. Then, the output capacitor C is charged with the signal charges S1 and S2. Similarly, before time t6, a reset pulse 308 is inputted for resetting the output capacitor C, thus removing the signal charges S1 and S2. As a clock pulse 310 is inputted, at time t6, signal charge S3 is shifted and outputted to the output capacitor C. After time t7, the signal charges S3 and S4 are stored in the output capacitor C. In this way, the above operation is repeated in sequence until all signal charges are shifted to the output capacitor C from the CCD shift registers 106 and 108. Further, the analog signal processing circuit 112 is configured to acquire the image signal based on the signal charges S1, S3, . . . , S10799, and thus the low resolution scanning at 600 dpi is achieved.
As can be observed from FIG. 3, when the CCD sensing module 100 in FIG. 1 is used to perform a low resolution scanning, e.g., scanning at 600 dpi, it consumes the same time as required in the high resolution scanning, e.g., scanning at 1200 dpi. This is because the optimal exposure time has been set to 16 ms so it is required to spend 16 ms in an exposure for the scanning at 600 dpi. Besides, for low resolution scanning, the CCD shift registers 106 and 108 are also required to shift all of the signal charges S1, S3, . . . , S10799 and S2, S4, . . . , S10800 to the output capacitor C, resulting in the same time as required in the high resolution scanning.
Thus, the conventional approach described above has the disadvantage that scanning at a low resolution uses the same time as scanning at the high resolution. During the low resolution scanning such as scanning at 600 dpi, only either the odd-numbered signal charges S1, S3, . . . , S10799, or the even-numbered signal charges S2, S4, . . . , S10800 are acquired to be the required image signal, but the time spent on performing shifting and outputting the signal charges is the same as that for the high resolution scanning such as scanning at 1200 dpi.